L4956 5a low drop linear regulator splitted supply voltage for im- proved efficiency: -v pw : 3v min. power supply voltage -v sig : 4.5v min. signal supply voltage 5a output current fast load transient response 0.75v typ. drop out voltage at 5a inhibit with zero current comsumption power good short circuit protection thermal shutdown heptawatt package applications pentium ? and power pc ? supplies low cost solution for 3.3v to 1.5v conversion suitable for applications with stand by feature description the L4956 is an adjustable monolithic linear regu- lator designed to satisfy very heavy load transient and efficient power conversion from 3.3v to 1.26v and lower, up to 5a. designed in bcdii technology, it uses a charge pump technique to have a proper internal n-chan- nel gate drive. the signal supply voltage input v sig can operate from 4.5v up to an absolute of 7v and the power supply voltage input v pw can opearte from 3v min to an absolute of 7v. an rdson of 150mv gives a voltage drop of 750mv at 5a of load current. very fast load transients and 1% of reference voltage precision makes this device suitable for supplying last micrprocessors generation and low voltage logics. the heptawatt package enriches the device with auxiliary functions like power good and inhibit. march 1998 heptawatt ordering number: L4956 multipower bcd technology v pw v sig d96in374b 1 2 7 out 5 adj 4 gnd L4956 c 1 r 1 r 2 c 2 v o v pw =3.3vbus v sig = 5vbus 36 inh pg c 3 typical application 1/8
absolute maximum ratings symbol parameter value unit v pw ,v sig supply input voltage 7 v adj pin pg and inh pins -0.3 to 4 0tov sig v v p tot power dissipation @ t amb =50 c power dissipation @ t case =90 c 2 15 w w t st ,t i storage temperature -40 to +150 c pin functions no. name function 1v pw unregulated power input voltage; this pin must be bypassed with a capacitor larger than 10 m f. 2v sig unregulated signal input voltage this pin has to be by passed with a minimum capacitor of 0.1 m f. 3 inh ttl-cmos input. a logic level on this input disable the device. an internal pull-down insures insures full functionally even if the pin is open. 4 gnd ground. 5 adj the output is connected directly to this terminal for 1.26v operation via divider for higher voltages. 6 pg open drain output, this pin is low when the output voltage is lower than 90%, otherwise is high. 7 out regulated output voltage. a minimum bypass capacitor of 22 m f is required to insure stability. 1 2 3 4 5 6 7 out pg adj gnd inh v sig v pw d96in373 tab connected to pin 4 pin connection (top view) v pw pre regulator v ref = 1.26v + - e/a out adj gnd pg d96in372a 1 3 6 4 5 7 inhibit active high 1.26v inh v pw 10 m f current limitation thermal shutdown foldback buffer charge pump power dmos 150m w + - 0.9v ref r1 22 m f r2 v out v sig 2 v sig block diagram L4956 2/8
electrical characteristics (t j =25 c, unless otherwise specified) symbol parameter test condition min. typ. max. unit v pw power operating supply voltage 3 6.5 v v sig signal operating supply voltage 4.5 6.5 v v out output voltage (1) 0 < tj < 125 c; v pw = 3.3v 4.5v < v sig < 6.5v; 0.1a < i o <5a 1.240 1.260 1.280 v 3v < v pw <5.5v;4.5vL4956 3/8
power dissipation lim it 012345678 0 1 2 3 4 5 6 7 8 (vpw - vout) [v] o utput current [a] vpw > 3v v s ig > 4.5 v tj = 125 c tc = 2 5 c pdm ax = 40 w current lim ita tion rdson lim it dc operating area tc = 7 0 c pdm ax=22 w figure 1. dc operating area. -40 0 40 80 120 160 1.24 1.245 1.25 1.255 1.26 1.265 1.27 1.275 1.28 tj [ c] vout [v] vpw = 3.3v vsig = 5v iout = 10ma figure 2. output voltage stability vs. junction temperature 012345 -5 -4 -3 -2 -1 0 1 2 3 4 5 iout [a] o utput voltage deviation [m pulsed tecnique has been used vpw = 3.3v vsig = 5v vout = vadj tj = 25 c figure 3. load regulation. 0123456 0 0.25 0.5 0.75 1 1.25 iout [a] minimum vpw - vout voltage [v] tj = 125 c tj = 25 c tj = -40 c pulsed technique has been used figure 4. dropout voltage. -40 -20 0 20 40 60 80 100 120 140 160 0 1 2 3 4 5 6 7 8 9 10 tj [?c] output current [a] (vpw -vout) > 2v pulsed tecnique has been used figure 5. maximum output current vs. junction temperature -40 -20 0 20 40 60 80 100 120 140 160 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 tj [ c] iq [m a] v sig =6.5v iout = 10m a to 5a 3vL4956 4/8
01234567 0 0.5 1 1.5 2 2.5 3 vsig [v] iq [m a] io = 1 0m a to 5 a tj = 25 c 3v < vpw < 6.5v figure 7. quiescent current at pin vsig vs. signal input voltage. 4 4 .5 5 5 .5 6 6 .5 7 0 25 50 75 100 125 150 v s ig [v ] iq [ m a] tj = 25 c 3v < vpw < 6.5v figure 8. stand-by current at pin vsig vs. signal input voltage with inh = logic high pg v adj 0.9 v adj hyst = 200mv high low low t t d96in364b v out =v adj (r1+r2)/r2 figure 9. power good function v inh vref = 1.26v hyst = 200mv regulator off t t regulator on regulator on d96in365a figure 10. inhibit function L4956 5/8
load transient response figure 11. vout 50mv/div ch1gnd 5a 0.5a ch2gnd iout 2a/div t=5 m s/div figure 12. vout 50mv/div ch1gnd 5a t=5 m s/div figure 13. vout 50mv/div ch1gnd 5a t = 100 m s/div 0.5a ch2gnd iout 2a/div 0.5a ch2gnd iout 2a/div c1,c2 470 m f panasonic hfq r4 24 w r5 126 w c4 to c9 100 m f/10v avx tps 6 each c10 to c15 1 m f avx x7r 6 each vout=1.5v vin=3.3v 1 v pw gnd 43 inh 7 out 5 adj L4956 pg 6 d97in593 v sig c16 220nf v sig =5v 2 figure 14. load transient test circuit. test conditions: v pw = 3.3v; v sig =5;v out = 1.5v; load transient from 0.5a to 5a; dl out dt = 20a/ m s; tj = 25 c L4956 6/8
heptawatt package mechanical data dim. mm inch min. typ. max. min. typ. max. a 4.8 0.189 c 1.37 0.054 d 2.4 2.8 0.094 0.110 d1 1.2 1.35 0.047 0.053 e 0.35 0.55 0.014 0.022 f 0.6 0.8 0.024 0.031 f1 0.9 0.035 g 2.41 2.54 2.67 0.095 0.100 0.105 g1 4.91 5.08 5.21 0.193 0.200 0.205 g2 7.49 7.62 7.8 0.295 0.300 0.307 h2 10.4 0.409 h3 10.05 10.4 0.396 0.409 l 16.97 0.668 l1 14.92 0.587 l2 21.54 0.848 l3 22.62 0.891 l5 2.6 3 0.102 0.118 l6 15.1 15.8 0.594 0.622 l7 6 6.6 0.236 0.260 m 2.8 0.110 m1 5.08 0.200 dia 3.65 3.85 0.144 0.152 L4956 7/8
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs- thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1998 sgs-thomson microelectronics printed in italy all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. L4956 8/8
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